1. Field of the Invention
The present invention relates to a magnetic recording and reproducing apparatus and to a method of recording and reproducing. More specifically, the present invention relates to a magnetic recording and reproducing apparatus such as a digital audio recorder (hereinafter referred to as DAT) having rotary heads and recording audio signals and the like on a magnetic tape by converting the audio signals into successive digital signals and reproducing the recorded digital signals, and to a method of recording and reproducing.
2. Description of the Background Art
A DAT is disclosed in, for example, "The Outline of DAT standardization", Journal of Institute of Electronics, Information and Communication Engineers of Japan, January, 1987.
FIG. 56 is a schematic block diagram showing a whole structure of such a conventional DAT. The structure of the DAT will be described with reference to FIG. 56. Analog audio signals of left and right channels are inputted to an analog signal input terminal 1, and the inputted analog audio signals are applied to a low pass filter (LPF) 2 to restrict the bandwidth of the signals. The analog audio signals whose bandwidth is restricted are applied to an analog/digital converting circuit (hereinafter referred to as an A/D converting circuit) 3 to be converted into digital audio signals. The digital audio signals are stored in a memory circuit 4. A coding circuit 5 is connected to the memory circuit 4. The coding circuit 5 generates codes for detecting or correcting errors of the digital audio signals stored in the memory circuit 4.
The digital audio signals read from the memory circuit 4 are applied to a modulating circuit 6 and modulated. The modulated digital audio signals are amplified by a recording amplifier 7 and applied to rotary heads 9 and 10 through a switching circuit 8 for switching between recording and reproducing. The rotary heads 9 and 10 are arranged on a rotary drum 11 having a diameter of 30 mm, and spaced from each other by 180 deg. A magnetic tape 12 is wound around the rotary drum 11 at the angle of 90 deg. The magnetic tape runs as a capstan (not shown) is rotated, and signals are recorded or reproduced by means of the rotary heads 9 and 10.
The digital signals reproduced by the rotary heads 9 and 10 are applied to a reproducing amplifier 13 through the switching circuit 8. The reproducing amplifier 13 amplifies the reproduced digital audio signals and applies the same to a demodulating circuit 14. The demodulating circuit 14 is used to demodulate the reproduced digital signals and applies the demodulated output to a memory circuit 15. A decoding circuit 16 is connected to the memory circuit 15. The decoding circuit 16 carries out error correction and error detection of the reproduced digital audio signals. The reproduced digital audio signals read from the memory circuit 15 are applied to a digital/analog converting circuit (hereinafter referred to as a D/A converting circuit) 17 to be converted into analog audio signals. The converted analog audio signals are outputted to analog signal output terminals 19 of left and right channels.
A drum motor 21 is provided for rotating the rotary drum 11 and a capstan motor 22 is provided for rotating the capstan (not shown). Drum motor 21 and the capstan motor 22 have their speed of rotation controlled by a servo circuit 20. A microcomputer for processing sub code signals (hereinafter referred to as a microcomputer) 23 is provided for processing sub code signals which are related to the main audio signals. In relation to the microcomputer 23, input keys 24 for setting input data or instructions and a display 25 for displaying the contents of the sub code signals outputted from the microcomputer 23 are provided.
The DAT further comprises a digital input terminal through which digital audio data (which will be described later) are inputted directly from external sources, and a digital output terminal 27 for directly outputting the digital audio data to external devices. The digital input terminal 26 and the digital output terminal 27 are connected to a digital interface circuit 28. A clock generating circuit 29 is further provided, which supplies clock signals necessary for respective circuits.
FIG. 57 schematically shows signals recorded on the magnetic tape 12 and FIG. 58 schematically shows signals recorded on 1 track.
A helical track pattern 30 is recorded on the magnetic tape 12 by the rotary head (9) shown in FIG. 56, and a helical track pattern 31 is recorded by the rotary head 10. Linear track patterns 32 and 33 are recorded on both ends of the magnetic tape 12. The helical track patterns 30 and 31 comprise, as shown in FIG. 58, a PCM signal area 36 on which the digital audio signals as main signals and testing signals for error correction are recorded, sub code signal areas 34 and 38 on which sub code signals related to the main signals are recorded, and servo signal areas 35 and 37 on which servo controlling signals are recorded. Areas for recording signals of a prescribed frequency are provided between respective areas and on both ends of the track, so that the helical track is constituted by a total of 196 blocks in total.
The head width of the two rotary heads 9 and 10 is about 20 .mu., and the azimuth angle between each other is 20 deg. In normal recording and reproducing, the rotary drum 11 is rotated constantly at 2000 rpm and the tape running speed is 8.15 mm/sec. Consequently, the pitch of the helical tracks becomes 13.6 .mu.. The helical track patterns 30 and 31 of FIG. 57 schematically show signals in the PCM signal area 36, which include a testing signal Q for error correction and sampled Odd data and Even data of the left and right channels L and R of stereo signals. When, the error correction code is completed in 1 track, and interleaving of the audio signals is adapted to be completed in 2 tracks.
FIG. 59 shows a block format of the PCM signal area 36 shown in FIG. 58, and FIG. 60 show structures of ID codes stored in the PCM signal block shown in FIG. 59.
The block format of the PCM signal area 36 is described with reference to FIG. 59. In 1 block of the PCM signal area 36, a synchronization signal 39, an ID code 40, a block address 41 and a parity signal 42 for detecting errors in the ID code 40 and the block address 41 are recorded, each consisting of 8 bits. The block of the PCM signal area 36 further comprises an area 43 in which PCM data and a checking signal for error correction are recorded, which area 43 comprises 256 bits. Therefore, 1 block of the PCM signal area 36 comprises 288 bits. In the recording area of the ID code 40, important information such as the sampling frequency of the system is recorded.
The format of recording such information is described with reference to FIG. 60. As shown in FIG. 60, 4 PCM signal blocks are used for recording various ID codes. The 4 PCM signal blocks include frame addresses 44 consisting of 4 bits. In Format ID 45, "00" is recorded when digital audio signals are to be recorded. Important information such as the sampling frequency of the system is recorded in the data recording area in 2 bits in each of areas ID 1 to ID7.
FIG. 61 shows bit assignment of the ID1 to ID7 shown in FIG. 60. As shown in FIG. 61, the sampling frequency of the system is determined in accordance with the information of ID2. The DAT corresponds to three different sampling frequencies, that is, 48 kHz, 44.1 kHz and 32 kHz.
FIG. 62 shows a block format of the sub code signal areas 34 and 38 shown in FIG. 58. As shown in FIG. 62, in 1 block of the sub code signal area, a synchronization signal 46, SUB IC code 47, a parity signal 48 for detecting errors in the SUB ID code 47, sub code data and a checking signal 49 for error correction are recorded. The areas of the synchronization signal 46 to the parity signal 48 consist of 32 bits, and the area in which the sub code data and the checking signal 49 for error correction are recorded consist of 256 bits. Therefore, the block of the sub code signal areas 34 and 38 comprises 288 bits, as is the case of the PCM signal area 36.
In the sub code signal areas 34 and 38 program start signals (signal indicative of the starting point of program), are recorded and program number information, time information and so on related to the audio signals are recorded in the PCM signal area 36.
FIG. 63 shows a signal format in which the program start signal, program number information and the like are recorded. In FIG. 63, the synchronization signal 46, the SUB ID code 47, the parity signal 48, the sub code data and the checking signal 49 for error correction are the same as those shown in FIG. 62, so that the description thereof is not repeated. Various sub code signals are recorded using 2 blocks of the sub code signal areas 34 and 38. In an area 50, a control ID is recorded, in which the program start signal (defined as a start ID signal) and the like are recorded. In an area 51, a data ID is recorded, and when digital audio signals are to be recorded, "0000" is recorded. In an area 52, a pack ID is recorded which shows the number of packs (which will be described in detail later) recorded on the sub data recording area 49. In an area 53, the tune number information is recorded. In an area 54, block addresses of the sub code signal areas 34 and 38 are recorded. The area 55 is called a pack, constituted by 64 bits, in which pack the time information and the like are recorded. A checking signal for error correction is recorded in an area 56. The positions of various sub code signals recorded in the areas 50 to 56 are determined as shown in FIG. 63, and the sub code signal areas 34 and 38 have the signal recording format completed in 2 blocks.
FIG. 64 shows a pack format of the sub code signals and FIG. 65 shows PACK ITEM and the contents thereof.
As shown in FIG. 64, the format of the pack 55 includes a PACK ITEM recording area 57 showing the contents of the data stored in the pack, a PACK DATA recording area 58, and an area 59 in which parity signals for detecting errors in the contents of the PACK ITEM recording area 57 and in the PACK DATA recording area 58 are recorded.
As shown in FIG. 65, the content of the data stored in the pack is determined corresponding to the PACK ITEM. One example of the information stored in the pack is shown in FIGS. 66 and 67. In FIG. 66, the PACK ITEM 57 is "0001", which content is Program Time. In the example shown in FIG. 67, the PACK ITEM 57 is "0011", which is the Running Time recording format, as is apparent from FIG. 65. B3 of PC=1 is set to 0. In the examples of the pack format shown in FIGS. 66 and 67, the program number, index number, hour, minutes, second and frame number are recorded as pack data. As shown in FIGS. 66 and 67, an area for recording the program number is also provided in the pack.
FIG. 68 shows timing relation between recording and reproducing of audio signals and sub code signals.
The operation of a conventional DAT will be described with reference to FIGS. 56 and 68. In FIG. 56, the analog audio signals of 2 channels, that is, the left and right channels, inputted to the analog signal input terminal 1 have their frequency bandwidth restricted by the low pass filter 2, and the audio signals are applied to the A/D converting circuit 3 to be converted into digital audio signals WL.sub.n, WR.sub.n (n=0, 1, 2 . . . ). The reference character n shows the order of sampling. The signals of the left and right channels are sampled alternately to be successively outputted as WL.sub.0, WR.sub.0, WL.sub.1, . . . and temporarily stored in the memory circuit 4. The samples are read from memory circuit 4 in accordance with an order as needed to be applied to the coding circuit 5. The coding circuit 5 adds error correcting codes and error detecting codes to the read samples and writes the same in the memory circuit 4.
When the sub code is designated by the input key 24, the designated sub code signal is generated by the microcomputer 23 and is applied to the memory circuit 4 to be temporarily stored therein. The sub code signals are also read in accordance with a prescribed order to be applied to the coding circuit 5, to which the error correcting codes and error detecting codes are added, and the resulting signals are again written in the memory circuit 4. The microcomputer 23 applies the contents of the sub code signals to be recorded to the display apparatus 25 so as to display the same.
The data written in the memory circuit 4 are applied to the modulating circuit 6 which converts the data into a series of signals suitable for recording on the magnetic tape 12, and the signals are amplified by the recording amplifier 7. Thereafter, they are recorded on the magnetic tape 12 by means of the two rotary heads 9 and 10, through the switching circuit 8. In actual use, the memory circuit 4 is divided into two groups. While sampling of digital audio signals and writing of sub code signals are carried out in one group, coding and reading are carried out in the other group. The manner of operation is disclosed in the timing diagram of FIG. 68.
As described above, the magnetic tape 12 is wound around the rotary drum 11, through an arc of 90 deg, and the recording and reproducing are carried out by two rotary heads 9 and 10. Therefore, in the recording and reproducing waveforms, the signal recording, and reproducing section of a 90 deg arc of rotation each and the interval sections of 90 deg arcs of rotation each exist alternately, as shown in FIG. 68 (62). The signal recording and reproducing section of a 90 deg arc of rotation corresponds to the recording and reproduction of a single scanning. As shown in FIG. 68 (60), samples of the digital audio signals at the time Tn are written in one group of the memory circuit 4 in the period Tn WT, so that samples of two scannings are stored. Thereafter, in the first 1/4 (T.sub.n EN.sub.1 period of FIG. 68) at the beginning of the period Tn+a single, signals of 1 scanning are encoded, and they are read in the succeeding period T.sub.n RD.sub.1. The remaining signals of a single scanning are encoded in the period T.sub.n EN.sub.2 and read in the period T.sub.n RD.sub.2. Namely, the digital audio signals sampled in the period T.sub.n are recorded on the magnetic tape 12 delayed by a 360 deg arc (corresponding to one rotation of the rotary drum 11).
As shown in FIG. 68 (61), the sub code signals outputted from the microcomputer 23 in the period T.sub.n (former half of the period T.sub.n) are written in the memory circuit 4 in the period T.sub.m WT, encoded in the succeeding period T.sub.n EN, and read in the period T.sub.m RD. Namely, the sub codes signals recorded on the magnetic tape 12 are delayed by 180 deg (corresponding to 1/2 rotation of the rotary drum). Referring to the recording and reproducing signals shown in FIG. 68(62), the reference numeral T.sub.n in the numerator part of the fraction shows that audio signals of the period T.sub.n are included, and the reference character T.sub.m in the denominator part shows that the sub code signals of the period T.sub.m are included.
In reproduction, the switching circuit 8 is switched to the reproducing side, and the signals are reproduced from the magnetic tape 12 by means of the rotary heads 9 and 10 and applied to the reproducing amplifier 13. The reproducing amplifier 13 amplifies the applied signals and applies the same to the servo circuit 20 and to the demodulating circuit 14. The servo circuit 20 generates a tracking error signal based on the servo controlling signal recorded on the servo signal areas 35 and 37 to control the speed of rotation of the capstan motor 22 so as to enable accurate tracking. The demodulating circuit 14 demodulates the reproduced signals to the original base band signals which are successively stored in the memory circuit 15.
The digital signals stored in the memory circuit 15 are read in an order as needed to be applied to the decoding circuit 16, in which correction, detection and compensation of errors are carried out by the decoding of the error correcting codes. Then signals are again written in the memory circuit 15. The samples of the digital audio signals with error corrected and compensated are outputted to the D/A converting circuit 17 or to the digital interface circuit 28. The D/A converting circuit 17 converts the digital audio signals into the original analog audio signals. The analog audio signals have any unnecessary frequency components removed by the low pass filter 18, and the analog audio signals of the left and right channels are outputted from respective analog signal output terminals 19.
The digital interface circuit 28 converts the samples with errors corrected and compensated into prescribed formats to output the same from the digital output terminal 27.
The contents of the demodulated sub code signals are displayed on the displaying apparatus 25 by the microcomputer 23. As is the memory circuit 4, the memory circuit 15 is divided into two groups in actual use. Writing and decoding are carried out in one group, and reading is carried out in the other group. The manner of operation is shown in FIG. 68 (62) to (64). As shown in FIG. 68 (63), the samples of the first scanning of the audio signals in the period T.sub.n-1 of the reproduced signals are written in the memory circuit 15 temporarily in the period T.sub.n-1 WT.sub.1, and recorded in the pause interval period of a 90 deg arc of rotation represented as T.sub.n-1 DE.sub.1 to be stored again in the memory circuit 15. Thereafter, in the period T.sub.n-1 WT.sub.2, the remaining 1 scan samples are written in the memory circuit 15, and they are decoded in the next period T.sub.n-1 DE.sub.2 to be stored in the memory circuit 15. The stored samples of 2 scannings are read from the memory circuit 15 in the succeeding period T.sub.n-1 to be applied to the D/A converting circuit, 17 or to the digital interface circuit 28. The samples of the reproduced digital audio signals are outputted to extended devices with a delay of 360 deg of rotation.
As shown in FIG. 68, the sub code signals in the period T.sub.m-1 of the reproduced signals are written in the memory circuit 15 in the period T.sub.m-1 WT, and decoded in the period T.sub.m-1 DE to be again stored in the memory circuit 15. Thereafter, the sub code signals are read from the memory circuit 15 in the period T.sub.m-1 RD to be applied to the microcomputer 23. Therefore, the contents of the reproduced sub code signals are displayed on the displaying apparatus 25 delayed by a 180 deg arc of rotation.
Now, the digital data inputted to the digital input terminal 26 shown in FIG. 56 are determined as the digital audio interface format by the standard CP-340 of the Electronic Industries Association of Japan or by the IEC (International Electrotechnical Commission) standard IEC958. Such a format will be described in the following.
FIG. 69 shows signal structure of a sub frame of the digital audio interface format, FIG. 70 shows a format for transmitting signals of 2 channels, and FIG. 71 shows a channel status data format for professional use.
Referring to FIG. 69, 1 word of audio signals is transmitted as a sub frame having 32 bits. The sub frame comprises a synchronizing preamble 101, a auxiliary signal 102, an audio signal 103, a validity flag (V) 104 indicative of the reliability of the audio signal 103, a user data bit (U) 105, a channel status bit 106 (C) and a parity bit (P) 107.
When the sub frame such as shown in FIG. 69 is to be transmitted as the signals of 2 channels, a single frame is formed by two sub frames, that is, the channel a single and the channel 2, as shown in FIG. 70, and 1 block is formed by 192 frames. In order to identify the starting point and the channels of each block, three different synchronizing preambles B, M and W are used. The synchronizing preamble B is used for the sub frame channel 1 at the head of the block. The synchronizing preamble M is used for the sub frame of the remaining channel 1. The synchronizing preamble W is used for all the sub frames of the channel 2. 1 block of the channel status data is formed of 192 channel status bits 106. The first bit of each block is transmitted in a frame which starts with the synchronizing preamble B.
The block format of the channel status data for professional use is structured as shown in FIG. 71. This format further includes information having close relation to the audio parameters such as emphasis, sampling frequency and the like, time information such as time-of-day code and local sample address code. Two pieces of different time information are the time information of the audio data transmitted by a frame starting with the synchronizing preamble "B" shown in FIG. 70. Highly accurate editing on a sample by sample basis is enabled, as the information have the same level of accuracy as the sample.
The signals of the above described format are applied to the digital interface circuit 28 through the digital input terminal 26 shown in FIG. 56. The digital interface circuit 28 extracts the audio data and the channel status data from the inputted signals to output the same. The outputted audio data are applied to the memory circuit 4. The same processing as in the recording of the analog input signals described above are carried out, and the data are recorded on the magnetic tape 12. Important information such as emphasis of the channel status data, the sampling frequency and the like are applied to the microcomputer 23 to be stored in the PCM ID of the DAT. At the same time, the digital interface circuit 28 controls the clock generating circuit 29 to generate synchronized clock signals, in order to accurately input the external digital data.
The conventional DAT operates as described above to record and to reproduce digital audio signals. However, connections to other AV equipment such as video tape recorders other than the DAT have not been considered. It is especially difficult to operate the DAT for professional use in synchronization with other AV devices for professional use such as VTRs.
Generally, in editing video tapes or the like, it is essential to recognize the position of the edited tape. Especially in electronic editing, handling of the edited tape position is the important problem in driving the system. For this purpose, recording and utilization of time codes such as second address or frame address on the cue track as position information on the tape have been proposed and determined as IEC standard: IEC 461.
FIG. 72 shows the frame format of the standard SMPTE/EBU/Film time code, and FIG. 73 shows frame frequencies of various time code signals and of the DAT.
The SMPTE/EBU/Film time code is described with reference to FIG. 72. The time code is mainly used for the television system, and hour, minutes, second and frame are assigned to the respective television frames. The time code comprises 80 bits per each frame, the value of each of the hour, minute, second and frame of the time code is represented in the decimal notation, the first digit and the 2nd digit of each value are separately converted into binary coded decimal code to be altered to the respective bits.
In the SMPTE time code, the frame value has numbers starting from 00 frame to 29 frame. The frame frequency is 30 Hz and 29.97 Hz as shown in FIG. 73. A drop frame mode and a non drop frame mode are prepared for respective frequencies. The frame frequencies of the EBU time code and of the Film time code are 25 Hz and 24 Hz, respectively, and the frame value are numbered from 00 frame to 24 frame and from 00 frame to 23 frame, respectively.
As shown in FIG. 73, the frame frequencies of the SMPTE/EBU/Film time code are different from the frame frequency of the DAT. Therefore, it is difficult to record the SMPTE/EBU/Film time code directly on the magnetic tape 12 by means of the rotary heads of the DAT.
In order to solve such a problem, direct recording and reproducing of the time code by using a fixed head on the linear track 32 or 33 shown in FIG. 57 has been proposed. However, if a fixed head is provided in the tape transport mechanism, the structure becomes complicated, and it becomes necessary to accurately maintain the positional relation between the rotary head 12 and the fixed head. The linear tracks 32 and 33 are positioned on both ends of the magnetic tape 12, so that they are easily damaged, reducing the reliability of the time code data. As described above, the tape running speed is as slow as 8.15 mm/sec, so that the recording and reproducing of the signals are difficult. Now, one of the features of DAT is a high speed searching function using the sub code signals, the speed of which is more than 200 times normal speed. However, when the tape running speed is increased, the time code recorded on the linear tracks 32 and 33 cannot provide the signals, and therefore high speed search by the time code becomes impossible.
In addition, as described above, information having close relation to the audio signals such as emphasize, sampling frequency and the like as well as time information such as local sample address code and time code are included in the channel status data for professional use transmitted by the digital audio interface format. Synchronized operation with other AV equipment for professional use and electronic editing can be carried out by using information. However, in the conventional DAT shown in FIG. 56, recording of alphanumeric data, local sample address code or of the time-of-day code transmitted as part of the channel status data has not been taken into consideration.